Medium-Speed Operation - tPLH, tPHL = 60 ns (typ.) at VDD = 10 V
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Standardized, symmetrical output characteristics
5-V, 10-V, and 15-V parametric ratings
وصف
The CD4071BE OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates.