Description
The 74HC595 contains an 8-bit serial-in, parallel-out shift register that provides data to an 8-bit D-type memory register. The 74HC595's memory registers have three-state outputs.
The shift register and the memory register have separate clocks. 74HC595 shift register with the highest priority direct clear side , A serial input , and a serial output for cascading. When the output enable terminalOE) Is high, the output of the 74HC595 will be in a high-impedance state.
Both the shift register clock and the store register clock are edge-triggered. If the two clocks are tied together, the shift register will stay one clock pulse ahead of the storage register.
Product Introduction:
1.Output Drive Capability:15 LSTTL Loads
2.Outputs Directly Interface to CMOS,NMOS,and TTL
3.Operating Voltage Range:2-6V
4.Low Input Current:1.0uA
5.High Noise Immunity Characteristic of CMOS Devices
6.Chip Complexity:328 FETs or 82 Equivalent Gates
7.Improvements over HC595:improved propagation delays;50% lower quiescent power;improved input noise and latchup immunity