مميزات خاصة

【High-Speed USB-to-Serial Bridge】 480 Mbps Hi-Speed USB; 12 Mbps Full-Speed; 3.3V–5V Operating Voltage; Compatible with Windows, Linux, and Mac
【Versatile Protocol Support】 Supports JTAG; SPI Master; I2C; UART; Bit-Bang; FT1248; Configurable via External EEPROM for Custom Applications
【Synchronous FIFO Performance】 40 MB/s Sync FIFO Throughput; 8 MB/s Async FIFO; 60 MHz CLKOUT for FPGA Timing; Simplifies High-Speed Data Transfer
【 Reliability】 -40°C to +85°C Operating Range; 5V Tolerant I/O; Integrated LDO Regulator (5V→3.3V/1.8V); Power-On Reset Function
【Easy Integration & Compatibility】 Plug-and-Play with STM32, Raspberry Pi, and Arduino; Supports Hardware Flow Control; No USB Firmware Required for Basic Use

وصف

Key Specifications

Input Voltage: 3.3V–5V DC (Bus/Self-Powered)
USB Speed: 480 Mbps (Hi-Speed) & 12 Mbps (Full-Speed)
UART Data Rate: Up to 12 Mbaud (Hardware Flow Control Supported)
FIFO Throughput: 8 MB/s (Async), 40 MB/s (Sync)
Protocol Support: JTAG, SPI (Master), I2C, UART, Bit-Bang, FT1248
I/O Voltage: 3.3V Logic (+5V Tolerant)
Operating Temp: -40°C to +85°C
On-Chip Features: LDO Regulator (5V→3.3V/1.8V), Power-On Reset

Pin Functions

USB DP/DM: USB Data+/Data- Differential Pair
ADBUS[7:0]: Configurable I/O for SPI/I2C/Parallel FIFO Data
ACBUS[7:0]: GPIO/Control Pins (e.g., RS485 TXDEN Auto-Enable)
RD#/WR#: FIFO Read/Write Strobe (Active Low)
RXF#/TXE#: FIFO Buffer Status Flags (Low = Read/Write Ready)

Frequently Asked Questions (FAQ)

Q1: Driver compatibility for Windows/Linux/Mac?

Pre-install FTDI's royalty-free VCP/D2XX drivers (Win10/11, Linux 2.6+, Mac OS-X) from [ftdichip.com].

Q2: How to configure protocols like JTAG or SPI?

Use FT_PROG software to program external EEPROM via USB interface. Default: UART mode .

Q3: Why UART speed limited below 12Mbaud?

External level shifter (e.g., RS232/RS485 converter) caps max baud rate .

Q4: Can it control 5V MCUs despite 3.3V I/O?

Yes. +5V tolerance protects inputs when interfacing 5V systems .

Q5: How to achieve 40MB/s sync FIFO speed?

Enable synchronous 245 FIFO mode and use 60MHz CLKOUT for FPGA timing